1. Field of the Invention
The present invention generally relates to field effect transistor structures and, more particularly, to transistor structures including A stressed channel for carrier mobility enhancement.
2. Description of the Prior Art
At the present time, it is well-recognized that numerous gains in integrated circuit performance, functionality and manufacturing economy may be derived from shrinking the size of semiconductor devices. For example, reduction of size of structure in CMOS devices tends to reduce the channel resistance and increase the switching speed. However, as such devices are scaled to smaller sizes, scattering effects tend to degrade carrier mobility and prevent the full potential switching speed gain due to reduction of resistance from being realized.
CMOS device performance can be improved by development of structures which can apply a persistent tensile or compressive stress to the channel structures of FETs to increase carrier mobility since it has been recognized that compressive stress/strain increases hole mobility while tensile stress/strain increases electron mobility. Masking techniques and suitable materials and deposition techniques have been developed to allow compressive stress to be applied to PFETs and tensile stresses to be applied to NFETs on the same chip.
For example, embedded SiGe structures have been developed which can be placed directly in the source and drain regions to generate compressive stress in the channel and increase hole mobility of PFETs. Similarly, silicon carbon, which has a smaller lattice constant than silicon, can be used to build the embedded silicon carbon (e-Si:C) in NFET source and drain regions to generate tensile stress in the channel for electron mobility enhancement.
However, a substitutional carbon concentration of greater than one atomic percent is necessary to obtain significant improvement in device performance but the equilibrium substitutional solid solubility of carbon in silicon is very low. Low temperature conditions suitable for forming high substitutional carbon concentrations lead to very poor selectivity of deposition which may compromise device manufacturing yield. While some non-selective deposition techniques have been developed to develop high substitutional carbon concentrations, it is difficult to integrate Si:C into devices using non-selective deposition alone.